Infrared imaging systems may be used to detect infrared radiation. Such imaging systems can create an image of a scene of interest by capturing and processing infrared radiation emitted from the scene. Photodetectors provide electrical photocurrent signals responsive to radiation received from the scene, and the photocurrent is processed by ROICs.
For example, an infrared imaging system may be used as a night vision apparatus to display an image of a scene of interest at night by capturing infrared radiation emitted from the scene. A challenge for such systems is imposed because the output signal from the photodetector array comprising a plurality of pixels includes the wanted signal comprising the fine detail of the scene under surveillance resulting from flux from the scene of interest, superimposed upon an undesired (non-scene) “background” signal resulting from background flux. The background signal from background flux as used herein refers all signal contributions other than flux from the scene of interest, such as thermal flux from the lower temperature scene, flux from the lens, dewar or warm/cold-shield (if included), and leakage current from the electronics (e.g. transistors) in the photodetector array and the ROIC. The presence of unwanted background signals imposes constraints and limitations on the design and performance of any ROIC. A large fraction of the available charge storage capacity may be used to store/integrate charge associated with the background signal, leaving less capacity for the wanted signal associated with the scene and adding noise, thus degrading performance of the ROIC.
Conventional ROICs include integration capacitors for integrating the photocurrent received from photodetector pixels in the photodetector array, such as a typical enhancement mode n-channel metal oxide semiconductor field effect transistor (MOSFET) configured as an integration capacitor (Cint). Such n-channel MOSFETs generally have a threshold voltage (Vt) of about 0.5 V to 0.9V. n-channel MOSFETs in Nwells generally have a Vt of about 0.1V˜0.4V.
As known in the art, a MOSFET is capacitor-connected when its drain and source are shorted together to form one plate of the capacitor, and the gate provides the other plate of a capacitor, with one of these plates connected to an integration node in the ROIC with the other plate node coupled to a reference-node (e.g., such as grounded or hooked to some other fixed potential). Below Vt Cint will have a highly non-linear charge well integration voltage (Vint) vs. integrated charge (e−) relation, while this relation will be substantially linear above Vt until saturation is reached. For conventional ROICs, following a read of each pixel, Vint of the Cint is reset by applying a suitable reset voltage (Vrst) before initiating the next frame. Vrst will be at least Vt, such as about 1 V when Vt is 0.5V to 0.9V, which ensures Cint is always operated in its linear range during the entire charge integration process.
Vrst is sometimes chosen to maintain the linearity of unit cell amplifier's output signal during the charge integration process. A source follower configuration with a Vt of 0.5V˜1V (depending on process and N or P type MOSFET) is often chosen as a unit cell output amplifier. Therefore, a Vrst of 1V for example, may be selected to be greater than the Vt of 0.5V to 0.9 V even when Cint is linear for Vint>0.3V (up to around 3V, for example).
Known approaches for increasing charge well capacity to brighten the scene signal include current skimming, multiple capture, and logarithmic sensor approaches. Such known approaches generally add complexity to the implementation, and can suffer performance problems including significant non-uniformity of fixed pattern noise (FPN) among the pixels or segmented images.